Built-In Fault Injectors - The Logical Continuation of BIST?

With the increasing number of embedded computer systems being used in safety critical applications the testing and assessment of a system’s fault tolerance properties become a crucial issue. Experimental fault injection plays an important role in the process of fault tolerance assessment. The restricted accessibility of nodes within a chip or system-on-a-chip, however, make such experiments extremely difficult. The idea we want to promote in this paper is to add a fault injector on to the silicon that can perform fault injection automatically on demand during several stages of design. In a first step we discuss the usefulness of such an infrastructure IP module. Then, starting from an FPGA-based fault-injection toolset that we have already developed, we investigate the feasibility of designing such a module under the given tight economic constraints.